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RT9172F-14CG

1.4V, 3A fixed output voltage LDO regulator

Richtek Technology 

RT9172

Preliminary

Functional Description

Capacitor Selection

The RT9172 requires a minimum input capacitance of

1µF between the input and ground pins to prevent any

impedance interactions with the supply. The RT9172

requires a minimum of 10µF (tantalum, or electrolytic)

capacitance between the output and ground pins for

proper operation, if used 10µF ceromic please parrell

with 100µF tantalum or electrolytic. Larger capacitance

provides better load dynamics and noise performance.

Error Operation (FLG)

The RT9172 produces a logic low signal at the FLG pin

when the output drops out of regulation due to low input

voltage, current limiting, or thermal limiting.

The internal error FLG comparator has an open drain

output stage. Hence, the FLG pin should be pulled high

through a pull up resistor.

Sense Pin

In applications where the regulator output is not very

close to the load, RT9172 can provide better remote

load regulation using the SENSE pin. Fig.2 and Fig.3

depict the advantage of the SENSE option. RT9172

regulates the voltage at the output pin. Hence, the

voltage at the remote load will be the regulator output

voltage minus the drop across the trace resistance. For

example, in the case of a 3.3V output, if the trace

resistance is 100mΩ, the voltage at the remote load will

be 3V with 3A of load current, ILOAD. The RT9172

regulates the voltage at the sense pin. Connecting the

sense pin to the remote load will provide regulation at

the remote load, as shown in Fig.2 and Fig.3.

Chip Enable Operation

A CMOS logic level signal at the chip enable (EN) pin

will turn-off the regulator. Pin EN must be actively

terminated through a 10kΩ pull-up resistor for a proper

operation. If this pin is driven from a source that actively

pulls high and low (such as a CMOS rail to rail

comparator), the pull-up resistor is not required. This

pin must be tied to VIN if not used.

Dropout Voltage

The dropout voltage of a regulator is defined as the

minimum input-to-output differential required to stay

within 2% of the output voltage. The RT9172 uses an

internal MOS-FET with an RDS(ON) 160mΩ. For

CMOS LDOs, the dropout voltage is the product of the

load current and the RDS(ON) of the internal MOSFET.

Maximum Output Current Capability

RT9172 can deliver a continuous current of 1.5 A over

the full operating temperature range. A heatsink may

be required depending on the maximum power

dissipation and maximum ambient temperature of the

application. Under all possible conditions, the junction

temperature must be within the range specified under

operating conditions. The total power dissipation of

the device is given by:

PD = (VIN - VOUT) IOUT+ (VIN) IGND

where IGND is the operating ground current of the

device (specified under Electrical Characteristics).

The maximum allowable temperature rise (TRMAX)

depends on the maximum ambient temperature

(TAMAX) of the application, and the maximum

allowable junction temperature (TJMAX):

TRMAX = TJMAX – TAMAX

The maximum allowable value for junction to ambient

Thermal Resistance, θJA = TRMAX - TAMAX

The maximum allowable value for junction to ambient

Thermal Resistance, θJA, can be calculated using the

formula:

θJA = TRMAX / PD

RT9172 are available in TO-220, TO-263, and SOT-

223 packages. The thermal resistance depends in

amount of copper area or heat sink, and on air flow. If

the maximum allowable value of θJA calculated above

is ≧ 60 °C/W for TO-220 package, ≧ 60 °C/W for

TO-263 package, and ≧140 °C/W for SOT-223

package, no heatsink is needed since the package

can dissipate enough heat to satisfy these

requirements. If the value for allowable θJA falls below

these limits, a heat sink is required.

www.richtek-ic.com.tw

8

DS9172-03 April 2002

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