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DM74S20N

Dual 4-Input NAND Gate

Fairchild Semiconductor 

August 1986

Revised April 2000

DM74S20

Dual 4-Input NAND Gate

General Description

This device contains two independent gates each of which

performs the logic NAND function.

Ordering Code:

Order Number Package Number

Package Description

DM74S20N

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Connection Diagram

Function Table

Y = ABCD

Inputs

A

B

C

D

X

X

X

L

X

X

L

X

X

L

X

X

L

X

X

X

H

H

H

H

H = HIGH Logic Level

L = LOW Logic Level

X = Either LOW or HIGH Logic Level

Output

Y

H

H

H

H

L

© 2000 Fairchild Semiconductor Corporation DS006449

www.fairchildsemi.com

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