DM9013 Ver la hoja de datos (PDF) - Davicom Semiconductor, Inc.
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fabricante
DM9013
Davicom Semiconductor, Inc.
DM9013 Datasheet PDF : 75 Pages
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DM9013
3-port switch with Processor Interface
5. Pin Description
I = Input, O = Output, I/O = Input / Output, O/D = Open Drain, P = Power, PD=internal pull-low (about 50K Ohm)
# = asserted Low
5.1 Processor Bus Interface
Pin No.
1
Pin Name
CMD
2
CS#
I/O
Description
I Command Type
When high, the access of this command cycle is DATA
port
When low, the access of this command cycle is INDEX
port
I Processor Chip select Command
3
IOW#
I Processor Write Command
5
IOR#
I Processor Read Command
6
IRQ
O Interrupt Request
7,8,9,10,12,13,14,15,
16,17,19,20,22,23,25,26
28,29,30,31,33,34,36,37,
38,39,41,42,43,44,46,47
110
SD0~15
SD16~31
Reserved
I/O Processor Data Bus bit 0~15
I/O Processor Data Bus bit 16~31 or
General purpose pins when data bus is in 16-bit mode
O Reserved
5.2 General and LED pins
Pin No.
118,117,115,114,
113,112,111
119,121,122,123,
124,126,127,128
Pin Name
GP0~6
BWLED0~7
5.3 P2 MII / RMII / Reverse MII Interfaces
5.3.1 MII Interfaces
Pin No.
Pin Name
55
356
58,59,60,61
MDC
MDIO
TXD2_3~0
63
TXE2
64
TXC2
65
CRS2
66
COL2
67
RXER2
I/O
Description
I/O General I/O Ports
Registers GPCR and GPR can program these pins
I/O Bandwidth LED
I/O
O,PD
I/O
O,PD
O,PD
I/O
I/O
I/O
I
Description
MII Serial Management Data Clock
MII Serial Management Data
Port 2 MII Transmit Data
4-bit nibble data outputs (synchronous to the TXC2)
Port 2 MII Transmit Enable
Port 2 MII Transmit Clock.
Port 2 MII Carrier Sense
Port 2 MII Collision Detect.
Port 2 MII Receive Error
Preliminary datasheet
13
DM9013-15-DS-P03
April 9, 2009
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