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DS1083L

16MHz to 134MHz Spread-Spectrum Clock Modulator for LCD Panels

Maxim Integrated 

16MHz to 134MHz Spread-Spectrum

Clock Modulator for LCD Panels

Pin Description

PIN

NAME

DESCRIPTION

1

CLKIN Clock Input. 16MHz to 134MHz clock input (fIN).

2

GND Ground

3

SSO

Spread-Spectrum Clock Output. Outputs a center-dithered spread-spectrum version of the clock input at

CLKIN.

Spread-Spectrum Magnitude Select Inputs. These digital inputs select the desired spread-spectrum

4

SMSEL2 magnitude as shown in the table below. Both inputs contain pullup resistors (RPU) to VCC.

SMSEL2

SMSEL1

MAGNITUDE SELECTED (%)

0

0

±2

0

5

SMSEL1

1

1

±1.5

0

±1

1

1

±0.5

6

VCC Supply Voltage

Detailed Description

The DS1083L modulates an input clock to provide a cen-

ter-dithered spread-spectrum output. A 16MHz to

134MHz clock is applied to the CLKIN pin. The PLL

dithers the output clock about its center frequency at a

user-selectable magnitude. The user is required to cycle

power to the device each time there is a change in the

input frequency, for the PLL to lock correctly. This

ensures proper output frequency and dither rate. The

desired spread-spectrum magnitude is selected using

input pins SMSEL1 and SMSEL2 (see the Pin Description

for details). The DS1083L is capable of generating

spread-spectrum clocks from 16MHz to 134MHz.

Dither-Rate Selection

The output spread-spectrum dither rate is automatically

adjusted depending on the input frequency, to maxi-

mize EMI reduction.

The dither cycle rate is:

fIN/512, if fIN is between 16MHz and 33MHz

fIN/1024, if fIN is between 33MHz and 64MHz

fIN/2048, if fIN is between 64MHz and 134MHz

On power-up, the output clock (SSO) remains three-

stated until it reaches a stable frequency (fSSO). The

dither rate is selected by sampling the input clock at

power-up.

Applications Information

Power-Supply Decoupling

To achieve best results, it is highly recommended that a

decoupling capacitor is used on the IC power-supply

pins. Typical values of decoupling capacitors are

0.01µF and 0.1µF. Use a high-quality, ceramic, surface-

mount capacitor, and mount it as close as possible to

the VCC and GND pins of the IC to minimize lead

inductance.

Chip Information

SUBSTRATE CONNECTED TO GROUND

4 _______________________________________________________________________________________

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