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DS2415V Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2415V
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS2415V Datasheet PDF : 14 Pages
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DS2415
Functions flow chart (Figure 7). The master must first provide one of four ROM function commands: 1)
Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM. After a ROM function sequence has been
successfully executed, the real time clock functions are accessible and the master may then provide a real
time clock function command (Figure 5).
DETAILED PIN DESCRIPTION
PIN
SYMBOL DESCRIPTION
1
GND
Ground pin.
2
1-Wire Data input/output. Open drain.
3
VDD
Internal power line. Connect a capacitor
4
VBAT
Power input pin. 2.5V to 5.5V.
Crystal pins. Connections for a standard 32.768 kHz quartz crystal,
EPSON part number C-002RX or C-004R (be sure to request 6 pF load
capacitance).
5,6
X1,X2 NOTE: X1 and X2 are very high-impedance nodes. It is recommended
that they and the crystal be guard-ringed with ground and that high
frequency signals be kept away from the crystal area. See Figure 10 and
Application Note 58 for details.
BLOCK DIAGRAM Figure 1
64-BIT LASERED ROM
Each DS2415 contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code.
The next 48 bits are a unique serial number. The last 8 bits are a CRC of the first 56 bits. (See Figure 3.)
The 1-Wire CRC of the lasered ROM is generated using the polynomial X8 + X5 + X4 + 1. Additional
information about the Dallas Semiconductor 1-Wire Cyclic Redundancy Check is available in the Book
of DS19xx iButton Standards. The 64-bit ROM and ROM Function Control section allow the DS2415 to
operate as a 1-Wire device and follow the 1-Wire protocol detailed in the section ”1-Wire Bus System.”
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