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RF2619 Ver la hoja de datos (PDF) - RF Micro Devices

Número de pieza
componentes Descripción
Lista de partido
RF2619
RFMD
RF Micro Devices RFMD
RF2619 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
RF2619
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Function
CDMA+
Description
CDMA balanced input pin. This pin is internally DC-biased and should
be DC-blocked if connected to a device with a DC level, other than VCC,
present. A DC to connection to VCC is acceptable. For single-ended
input operation, one pin is used as an input and the other CDMA input
is AC-coupled to ground. The balanced input impedance is 1k, while
the single-ended input impedance is 500.
Interface Schematic
VCC
CDMA+
580
580
CDMA-
CDMA-
GND
GND
GND
GND
GND
NC
OUT-
OUT+
GND
GND
VCC
VCC
VCC
GC
Same as pin 2, except complementary input.
See pin 1 schematic.
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
Same as pin 3.
Same as pin 3.
Same as pin 3.
Same as pin 3.
No Connection pin. This pin is internally biased and should not be con-
nected to any external circuitry, including ground or VCC.
Balanced output pin. This is an open-collector output, designed to
operate into a 500balanced load. The load sets the operating imped-
ance, but an external choke or matching inductor to VCC must also be
supplied in order to correctly bias this output. This bias inductor is typi-
cally incorporated in the matching network between the output and next
stage. Because this pin is biased to VCC, a DC-blocking capacitor must
be used if the next stage’s input has a DC path to ground.
Same as pin 9, except complementary output.
OUT+
OUT-
See pin 9 schematic.
Same as pin 3.
Same as pin 3.
Supply Voltage pin. External bypassing is required. The trace length
between the pin and the bypass capacitors should be minimized. The
ground side of the bypass capacitors should connect immediately to
ground plane. Pins 13, 14, and 15 may share one bypass capacitor if
trace lengths are kept minimal.
Same as pin 13.
Same as pin 13.
Analog gain adjustment for all amplifiers. Valid control ranges are from
0V to 3.0V. Maximum gain is selected with 3.0V. Minimum gain is
selected with 0V. These voltages are valid only for a 3.3kDC source
impedance.
VCC
12.7 k
23.5 k
15 k
10
Rev B5 010720
10-27

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