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LTC1285CN8

3V Micropower Sampling 12-Bit A/D Converters in SO-8 Packages

Linear Technology 

LTC1285/LTC1288

APPLICATION INFORMATION

Transfer Curve

The LTC1285/LTC1288 are permanently configured for

unipolar only. The input span and code assignment for

this conversion type are shown in the following figures.

Transfer Curve

111111111111

111111111110

•

•

•

000000000001

VIN

000000000000

1LSB = VREF

4096

Output Code

LTC1285/88 • AI04

OUTPUT CODE

INPUT VOLTAGE

11111111111111

11111111111110

•

•

•

00000000000001

00000000000000

VREF – 1LSB

VREF – 2LSB

•

•

•

1LSB

0V

INPUT VOLTAGE

(VREF = 5.000V)

4.99878V

4.99756V

•

•

•

0.00122V

0V

LTC1285/88 • AI05

Operation with DIN and DOUT Tied Together

The LTC1288 can be operated with DIN and DOUT tied

together. This eliminates one of the lines required to

communicate to the microprocessor (MPU). Data is trans-

mitted in both directions on a single wire. The processor

pin connected to this data line should be configurable as

either an input or an output. The LTC1288 will take control

of the data line and drive it low on the 4th falling CLK edge

after the start bit is received (see Figure 3). Therefore the

processor port line must be switched to an input before

this happens to avoid a conflict.

In the Typical Applications section, there is an example of

interfacing the LTC1288 with DIN and DOUT tied together to

the Intel 8051 MPU.

ACHIEVING MICROPOWER PERFORMANCE

With typical operating currents of 160µA and automatic

shutdown between conversions, the LTC1285/LTC1288

achieves extremely low power consumption over a wide

range of sample rates (see Figure 4). The auto-shutdown

allows the supply curve to drop with reduced sample rate.

1000

100

TA = 25°C

VCC = 2.7V

VREF = 2.5V

fCLK = 120kHz

10

1

0.1

1

10

100

SAMPLE FREQUENCY (kHz)

LTC1285/88 • F04

Figure 4. Automatic Power Shutdown Between Conversions

Allows Power Consumption to Drop with Sample Rate

MSBF BIT LATCHED

CS

BY LTC1288

1

2

3

4

CLK

DATA

(DIN/DOUT)

START

SGL/DIFF

ODD/SIGN

MSBF

B11

B10

•••

MPU CONTROLS DATA LINE AND SENDS

MUX ADDRESS TO LTC1288

LTC1288 CONTROLS DATA LINE AND SENDS

A/D RESULT BACK TO MPU

PROCESSOR MUST RELEASE DATA LINE AFTER

4TH RISING CLK AND BEFORE THE 4TH FALLING CLK

LTC1288 TAKES CONTROL OF DATA LINE

ON 4TH FALLING CLK

Figure 3. LTC1288 Operation with DIN and DOUT Tied Together

LTC1285/88 F03

13

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