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LTC1287

3V Single Chip 12-Bit Data Acquisition System

Linear Technology 

LTC1287

APPLICATI S I FOR ATIO

RC Input filtering

It is possible to filter the inputs with an RC network as

shown in Figure 11. For large values of CF (e.g., 1µF) the

capacitive input switching currents are averaged into a net

DC current. A filter should be chosen with a small resistor

and large capacitor to prevent DC drops across the resistor.

The magnitude of the DC current is approximately IDC =

100pF × VIN/tCYC and is roughly proportional to VIN. When

running at the minimum cycle time of 33µs, the input

current equals 7.6µA at VIN = 2.5V. Here a filter resistor of

8Ω will cause 0.1LSB of full-scale error. If a large filter

resistor must be used, errors can be reduced by increasing

the cycle time as shown in the Typical Performance

Characteristics curve Maximum Filter Resistor vs Cycle

Time.

RFILTER IDC

VIN –

“+”

CFILTER

LTC1287

“–”

Acquisition Time vs Source Resistance). The input voltage

is sampled during the tSMPL time as shown in Figure 8. The

sampling interval begins at rising edge of CS and continues

until the falling edge of the CLK before the conversion

begins. On this falling edge the S&H goes into the hold

mode and the conversion begins.

Differential Input

With a differential input the A/D no longer converts a single

voltage but converts the difference between two voltages.

The voltage on the +IN pin is sampled and held and can be

rapidly time varying. The voltage on the –IN pin must

remain constant and be free of noise and ripple throughout

the conversion time. Otherwise the differencing operation

will not be done accurately. The conversion time is 12 CLK

cycles. Therefore a change in the –IN input voltage during

this interval can cause conversion errors. For a sinusoidal

voltage on the –IN input this error would be:

LTC1287 F11

Figure 11. RC Input Filtering

Input Leakage Current

Input leakage currents also can create errors if the source

resistance gets too large. For example, the maximum input

leakage specification of 1µA (at 85°C) flowing through a

source resistance of 1k will cause a voltage drop of 1mV

or 1.6LSB with VREF = 2.5V. This error will be much

reduced at lower temperatures because leakage drops

rapidly (see Typical Performance Characteristics curve

Input Channel Leakage Current vs Temperature).

SAMPLE-AND-HOLD

Single-Ended Input

The LTC1287 provides a built-in sample and hold (S&H)

function on the +IN input for signals acquired in the single

ended mode (–IN pin grounded). The sample and hold

allows the LTC1287 to convert rapidly varying signals (see

Typical Performance Characteristics curve of S&H

12

Where f(–IN) is the frequency of the –IN input voltage,

VPEAK is its peak amplitude and fCLK is the frequency of the

CLK. Usually VERROR will not be significant. For a 60Hz

signal on the –IN input to generate a 0.25LSB error

(150µV) with the converter running at CLK = 500kHz, its

peak value would have to be 16mV. Rearranging the above

equation, the maximum sinusoidal signal that can be

digitized to a given accuracy is given as:

For 0.25LSB error (150µV) the maximum input sinusoid

with a 2.5V peak amplitude that can be digitized is 0.4Hz.

Reference Input

The voltage on the reference input of the LTC1287

determines the voltage span of the A/D converter. The

reference input has transient capacitive switching cur-

rents due to the switched capacitor conversion tech-

nique (see Figure 12). During each bit test of the

1287fa

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