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EL7531
(Rev.:2005)

Monolithic 1A Step-Down Regulator with Low Quiescent Current

Intersil 

EL7531

Absolute Maximum Ratings (TA = 25°C)

VIN, VDD, PG to SGND . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V

LX to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VIN + +0.3V)

SYNC, EN, VO, FB to SGND . . . . . . . . . . . . . -0.3V to (VIN + +0.3V)

PGND to SGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V

Peak Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2A

Operating Ambient Temperature . . . . . . . . . . . . . . . .-40°C to +85°C

Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are

at the specified temperature and are pulsed tests, therefore: TJ = TC = TA

Electrical Specifications VDD = VIN = VEN = 3.3V, C1 = C2 = 10µF, L = 1.8µH, VO = 1.8V (as shown in Typical Application Diagram),

unless otherwise specified.

PARAMETER

DESCRIPTION

CONDITIONS

MIN TYP MAX UNIT

DC CHARACTERISTICS

VFB

Feedback Input Voltage

∆VOUT/VOUT VFB vs Temperature

PWM mode

Junction temperature = -40°C to +85°C

(see Figure 7)

790

800

810

mV

0.3

%

∆VOUT/VOUT

∆VOUT/VOUT

IFB

VIN, VDD

VIN,OFF

VIN,ON

IS

Line Regulation

Load Regulation

Feedback Input Current

Input Voltage

Minimum Voltage for Shutdown

Maximum Voltage for Startup

Input Supply Quiescent Current

Active - PFM Mode

Active - PWM Mode

IDD

Supply Current

RDS(ON)-PMOS PMOS FET Resistance

RDS(ON)-NMOS NMOS FET Resistance

ILMAX

Current Limit

TOT,OFF Over-temperature Threshold

TOT,ON

Over-temperature Hysteresis

IEN, ISYNC EN, SYNC Current

VEN1, VSYNC1 EN, SYNC Rising Threshold

VEN2, VSYNC2 EN, SYNC Falling Threshold

VPG

Minimum VFB for PG, WRT Targeted

VFB Value

VOLPG

PG Voltage Drop

AC CHARACTERISTICS

VIN = 3.3V to 5V, IO = 1A (see Figure 7)

IO = 0A to 1A, VIN = 3.3V (see Figure 7)

VIN falling

VIN rising

VSYNC = 0V

VSYNC = 3.3V

PWM, VIN = VDD = 5V

EN = 0, VIN = VDD = 5V

VDD = 5V, wafer test only

VDD = 5V, wafer test only

T rising

T falling

VEN, VRSI = 0V and 3.3V

VDD = 3.3V

VDD = 3.3V

VFB rising

VFB falling

ISINK = 3.3mA

0.1

%

0.4

%

100

nA

2.5

5.5

V

2

2.2

V

2.2

2.4

V

120

145

µA

6.5

7.5

mA

400

500

µA

0.1

1

µA

70

100

mΩ

45

75

mΩ

1.5

A

145

°C

130

°C

-1

1

µA

2.4

1.8

V

9

1.4

0.8

V

95

%

86

%

35

70

mV

FPWM

tSYNC

tSS

PWM Switching Frequency

Minimum SYNC Pulse Width

Soft-start Time

Guaranteed by design

1.25

1.4

25

650

1.6

MHz

ns

µs

2

FN7428.6

August 5, 2005

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