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EM78P153E
Elan Microelectronics Corp
EM78P153E Datasheet PDF : 52 Pages
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EM78P152/3S
8-Bit Microcontroller with OTP ROM
5.1.3 R2 (Program Counter and Stack)
Depending on the device type, R2 and hardware stack are 10-bit wide. The
structure is depicted in the following figure.
PC (A9 ~ A0)
Reset Vector
Interrupt Vector
000H
008H
Stack Level 1
Stack Level 2
Stack Level 3
Stack Level 4
Stack Level 5
On-chip Program
Memory
Figure 5-2 Program Counter Organization
3FFH
The configuration structure generates 1024×13 bits on-chip OTP ROM addresses
to the relative programming instruction codes. One program page is 1024 words
long.
R2 is set as all "0" when under RESET condition.
"JMP" instruction allows direct loading of the lower 10 program counter bits. Thus,
"JMP" allows PC to go to any location within a page.
"CALL" instruction loads the lower 10 bits of the PC, and then PC+1 are pushed
onto the stack. Thus, the subroutine entry address can be located anywhere
within a page.
"RET" ("RETLk", "RETI") instruction loads the program counter with the contents
of the top-level stack.
"ADD R2, A" allows a relative address to be added to the current PC, and the ninth
and tenth bits of the PC won’t be changed.
"MOV R2, A" allows loading of an address from the "A" register to the lower 8 bits
of the PC, and the ninth and tenth bits (A8 ~ A9) of the PC will remain unchanged.
Any instruction written to R2 (e.g. “ADD R2,A”, "MOV R2, A", "BC R2, 6",⋅⋅⋅⋅⋅) will
cause the ninth bit and the tenth bit (A8 ~ A9) of the PC to be cleared. Hence, the
computed jump is limited to the first 256 locations of a page.
All instructions are single instruction cycle (fclk/2 or fclk/4) except for instructions
that would change the contents of R2. Such instructions will need one more
instruction cycle.
6•
Product Specification (V1.8) 09.08.2009
(This specification is subject to change without further notice)
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