EP9312-IB Ver la hoja de datos (PDF) - Cirrus Logic

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EP9312-IB

Universal Platform System-on-chip Processor

Cirrus Logic 

EP9312

Universal Platform SOC Processor

List of Tables

Table A. Change History .......................................................................................................... 2

Table B. General Purpose Memory Interface Pin Assignments .............................................. 6

Table C. IDE Interface Pin Assignments .................................................................................. 7

Table D. Ethernet Media Access Controller Pin Assignments ................................................. 7

Table E. Audio Interfaces Pin Assignment .............................................................................. 7

Table F. LCD Interface Pin Assignments ................................................................................ 8

Table G. Touch Screen Interface with 12-bit Analog-to-Digital Converter Pin Assignments ... 8

Table H. 64-Key Keypad Interface Pin Assignments ............................................................... 8

Table I. Universal Asynchronous Receiver/Transmitters Pin Assignments ............................ 9

Table J. Triple Port USB Host Pin Assignments ..................................................................... 9

Table K. Two-Wire Port with EEPROM Support Pin Assignments .......................................... 9

Table L. Real-Time Clock with Pin Assignments ..................................................................... 9

Table M.PLL and Clocking Pin Assignments ........................................................................ 10

Table N. Interrupt Controller Pin Assignment ........................................................................ 10

Table O. Dual LED Pin Assignments ..................................................................................... 10

Table P. General Purpose Input/Output Pin Assignment ...................................................... 10

Table Q. Reset and Power Management Pin Assignments ................................................... 10

Table R. Hardware Debug Interface ...................................................................................... 11

Table R. 352 Pin Diagram Dimensions .................................................................................. 54

Table S. Pin Descriptions ..................................................................................................... 59

Table T. Pin Multiplex Usage Information ............................................................................. 60

DS515PP7

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