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FDC37C672TQFP

Enhanced Super I/O Controller with Fast IR

SMSC -> Microchip 

Enhanced Super I/O Controller with Fast IR

Datasheet

Chapter 4 Description of Multifunction Pins

PIN NO.

QFP/TQFP

2 / 100

32 / 30

33 / 31

51 / 49

52 / 50

92 / 90

94 / 92

95 / 93

96 / 94

97 / 95

98 / 96

99 / 97

100 / 98

ORIGINAL

FUNCTION

DRVDEN1

PCICLK

SERIRQ

nDACK3

DRQ3

nRI2

nDCD2

RXD2

TXD2

nDSR2

nRTS2

nCTS2

nDTR2

ALTERNATE

FUNCTION 1

IR MODE

IRQ4

IRQ3

8042 P16

8042 P12

8042 P16

8042 P12

IRRX

IRTX

SA15

SA12

SA13

SA14

ALTERNATE

FUNCTION 2

IRRX3

IRQ12

IRQ11

IRQ10

IRQ5

IRQ6

IRQ7

Note 4.1 Controlled by IRMODSEL(LD8:CRC0.0) and IRRX3SEL(LD8:CRC0.4)

DEFAULT

DRVDEN1

PCICLK

SERIRQ

nDACK3

DRQ3

nRI2

nDCD2

RXD2

TXD2

nDSR2

nRTS2

nCTS2

nDTR2

Note 4.2 Controlled by SERIRQSEL(LD8:CRC0.2)

Note 4.3 Controlled by DMA3SEL(LD8:CRC0.1)

Note 4.4 Controlled by 8042COMSEL(LD8:CRC0.3) and SERIRQSEL(LD8:CRC0.2)

Note 4.5 Controlled by IR Option Register( LD5:CRF1.6)

Note 4.6 Controlled by 16 bit Address Qual.(CR24.6) and SERIRQSEL(LD8:CRC0.2)

For more information, refer to Table 19.13 through Table 19.23.

NOTE

Note 4.1

Note 4.2

Note 4.2

Note 4.3

Note 4.3

Note 4.4

Note 4.4

Note 4.5

Note 4.5

Note 4.6

Note 4.6

Note 4.6

Note 4.6

SMSC FDC37C672

Page 15

PRELIMINARY DATASHEET

Rev. 10-29-03

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