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FDC37B72X

128 Pin Enhanced Super I/O Controller with ACPI Support

SMSC -> Microchip 

TAPE DRIVE REGISTER (TDR)

Address 3F3 READ/WRITE

TABLE 7 - TAPE SELECT BITS

TAPE SEL1

(TDR.1)

0

0

1

1

TAPE SEL0

(TDR.0)

0

1

0

1

DRIVE

SELECTED

None

1

2

3

The Tape Drive

Register (TDR) is included for 82077 software

compatibility and allows the user to assign tape

support to a particular drive during initialization.

Any future references to that drive automatically

invokes tape support. The TDR Tape Select bits

TDR.[1:0] determine the tape drive number.

TABLE 7 illustrates the

Tape Select Bit encoding. Note that drive 0 is the

boot device and cannot be assigned tape support.

The remaining Tape Drive Register bits TDR.[7:2]

are tristated when read. The TDR is unaffected by

a software reset.

TABLE 8 - INTERNAL 2 DRIVE DECODE - NORMAL

DRIVE SELECT OUTPUTS MOTOR ON OUTPUTS

DIGITAL OUTPUT REGISTER

(ACTIVE LOW)

(ACTIVE LOW)

Bit 7 Bit 6 Bit 5 Bit 4 Bit1 Bit 0

nDS1

nDS0

nMTR1

nMTR0

X

X

X

1

0

0

1

0

nBIT 5

nBIT 4

X

X

1

X

0

1

0

1

nBIT 5

nBIT 4

X

1

X

X

1

0

1

1

nBIT 5

nBIT 4

1

X

X

X

1

1

1

1

nBIT 5

nBIT 4

0

0

0

0

X

X

1

1

nBIT 5

nBIT 4

TABLE 9 - INTERNAL 2 DRIVE DECODE - DRIVES 0 AND 1 SWAPPED

DRIVE SELECT

MOTOR ON OUTPUTS

DIGITAL OUTPUT REGISTER

OUTPUTS (ACTIVE LOW)

(ACTIVE LOW)

Bit 7 Bit 6 Bit 5 Bit 4 Bit1 Bit 0

nDS1

nDS0

nMTR1

nMTR0

X

X

X

1

0

0

0

1

nBIT 4

nBIT 5

X

X

1

X

0

1

1

0

nBIT 4

nBIT 5

X

1

X

X

1

0

1

1

nBIT 4

nBIT 5

1

X

X

X

1

1

1

1

nBIT 4

nBIT 5

0

0

0

0

X

X

1

1

nBIT 4

nBIT 5

21

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