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MD56V62400 Ver la hoja de datos (PDF) - Oki Electric Industry

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MD56V62400 Datasheet PDF : 28 Pages
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E2G1050-17-X1
¡ ¡ SemicondSucetormiconductor
This versiMonD:5M6Va6r.21490908P/rHeliminary
MD56V62400/H
4-Bank ¥ 4,194,304-Word ¥ 4-Bit SYNCHRONOUS DYNAMIC RAM
DESCRIPTION
The MD56V62400/H is a 4-bank ¥ 4,194,304-word ¥ 4-bit synchronous dynamic RAM, fabricated
in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and
outputs are LVTTL compatible.
FEATURES
• Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell
• 4-bank ¥ 4,194,304-word ¥ 4-bit configuration
• 3.3 V power supply, ±0.3 V tolerance
• Input : LVTTL compatible
• Output : LVTTL compatible
• Refresh : 4096 cycles/64 ms
• Programmable data transfer mode
CAS latency (2, 3)
– Burst length (2, 4, 8)
– Data scramble (sequential, interleave)
• CBR auto-refresh, Self-refresh capability
• Package:
54-pin 400 mil plastic TSOP (Type II) (TSOPII54-P-400-0.80-K) (Product : MD56V62400/H-xxTA)
xx indicates speed rank.
PRODUCT FAMILY
Family
MD56V62400-10
MD56V62400-12
MD56V62400H-15
Max.
Frequency
100 MHz
83 MHz
66 MHz
Access Time (Max.)
tAC2
tAC3
9 ns
9 ns
14 ns
10 ns
9 ns
9 ns
1/28

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