74F283 Ver la hoja de datos (PDF) - Philips Electronics
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74F283 Datasheet PDF : 10 Pages
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Philips Semiconductors
4-bit binary full adder with fast carry
Product specification
74F283
Figure A shows how to make a 3-bit adder. Tying the operand inputs
of the fourth adder (A3, B3) Low makes Σ3 dependent only on, and
equal to, the carry from the third adder. Using somewhat the same
principle, Figure B shows a way of dividing the 74F283 into a 2-bit
and a 1-bit adder. The third stage adder (A2, B2, Σ2) is used as
means of getting a carry (C10) signal into the fourth stage adder (via
A2 and B2) and bringing out the carry from the second stage on Σ2.
Note that as long as A2 and B2 are the same, whether High or Low,
they do not influence Σ2. Similarly, when A2 and B2 are the same,
the carry into the third stage does not influence the carry out of the
third stage. Figure C shows a method of implementing a 5-input
encoder where the inputs are equally weighted. The outputs Σ0, Σ1
and Σ2 present a binary number of inputs I0–I4 that are true.
Figure D shows one method of implementing a 5-input majority gate.
When three or more of the inputs I0–I4 are true, the output M4 is
true.
APPLICATIONS
L
A0 B0 A1 B1 A2 B2 A3 B3
CIN
COUT
Σ0 Σ1 Σ2 Σ3
A0 B0 A1 B1
C10
A10 B10
A0 B0 A1 B1 A2 B2 A3 B3
CIN
CIN
COUT
C11
Σ0 Σ1 Σ2 Σ3
C3
A. 3-bit Adder
Σ0 Σ1 C2 Σ10
B. 2-bit and 1-bit Adder
I0 I1 L
I2
I3 I4
A0 B0 A1 B1 A2 B2 A3 B3
CIN
COUT
Σ0 Σ1 Σ2 Σ3
20 21 22
C. 5-input Encoder
I0 I1
I2
I3 I4
A0 B0 A1 B1 A2 B2 A3 B3
CIN
COUT
Σ0 Σ1 Σ2 Σ3
M4
D. 5-input Majority Gate
SF00856
1989 Mar 03
4
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