D75316 Ver la hoja de datos (PDF) - NEC => Renesas Technology

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D75316

4-bit single-chip microcomputer incorporating LCD controller/driver

NEC => Renesas Technology 

µPD75312(A), 75316(A)

3.2 NON PORT PINS

Also Served

Pin Name Input/Output As

Functon

When Reset

TI0

PTO0

PCL

BUZ

SCK

SO/SB0

SI/SB1

INT4

Input

Input/

Output

Input/

Output

Input/

Output

Input/

Output

Input/

Output

Input/

Output

Input

INT0

INT1

Input

INT2

Input

P13

Timer/event counter external event pulse Input

P20

Timer/event counter output

P22

Clock output

P23

Fixed frequency output (for buzzer or for trim-

ming the system clock)

P01

Serial clock input/output

Serial data output

P02

Serial bus input/output

Serial data input

P03

Serial bus input/output

Edge detection vector interrupt input (both

P00

rising and falling edge detection are effective)

P10

Edge detection vector

Clock synchronous

interrupt input (detection

P11

edge can be selected)

Asynchronous

P12

Edge detection testable

Asynchronous

input (rising edge detection)

Input

Input

Input

Input

Input

Input

Input

Input

Input

Input

Input/

Output

Circuit

TYPE*1

B -C

E-B

E-B

E-B

F -A

F -B

M -C

B

B -C

B -C

KR0-KR3

KR4-KR7

Input/

Output

Input/

Output

S0-S23 Output

P60-P63 Parallel falling edge detection testable input

P70-P73 Parallel falling edge detection testable input

—

Segment signal output

Input

F -A

Input

F -A

*2

G-A

S24-S31

COM0-

COM3

VLC0-VLC2

Output

Output

—

BP0-7 Segment signal output

—

Common signal output

—

LCD drive power

Internal dividing resistor (mask option)

*2

G-C

*2

G-B

—

—

BIAS

Output

—

Disconnect output for external expanded driver

*3

—

Input/

LCDCL*4 Output

P30

Externally expanded driver clock output

Input

E-B

SYNC*4

Input/

Output

P31

Externally expanded driver sync clock output

Input

E-B

To connect the crystal/ceramic oscillator to the

main system clock generator. When inputting the

X1, X2 Input

—

external clock, input the external clock to pin X1,

—

—

and the reverse phase of the external clock to pin

X2.

XT1

Input

To connect the crystal oscillator to the subsystem

—

clock generator.

When the external clock is used, pin XT1 inputs the

—

—

external clock. In this case, pin XT2 must be left

XT2

—

—

open.

Pin XT1 can be used as a 1-bit input (test) pin.

(to be cont'd)

11

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