GM82C765 Ver la hoja de datos (PDF) - Hynix Semiconductor
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Lista de partido
GM82C765 Datasheet PDF : 36 Pages
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SYMBOL
PARAMETER
t IDX
IDX Index Pulse Width
t STD
DIRC Hold Time after STEP
t MR
RD Delay from DMA
t MW
WR Delay from DMA
t MRW
RD or WR Response from DMA High
t CA
Chip Access Delay from RST Low-TTL
t CAS
Chip Access Delay from t SRST Low
t XCA
Chip Access Delay from RST-OSC XT1 at 16MHz
t XTS
XT2 Access Delay after RST 9.6MHz
t TCR
TC Delay from Last DMA or IRQ, RD
t TCW
TC Delay from Last DMA or IRQ, WR
Note: CY specifies CLK1 or XT1 period
MCY specifies MCLK period, dependent on selected data rate
WCY specifies WCLK period, dependent on selected data rate
2.4 AC Timing Diagrams
(1) READ Timing
CS, DACK. ,
A0
RD
DATA
t AR
t RR
t RD
Data Valid
IRQ
GM82C765B
MIN
2
96
0
0
32
40
500
1000
0
0
MAX UNITS
MCY
MCY
nS
nS
48 MCY
MCY
MCY
uS
uS
192 MCY
384 MCY
t RA
t DF
t RI
8
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