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GS1503BCVE2 Datasheet PDF : 90 Pages
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3. Host Interface
Table 3-1: Mode A (CPU_SEL set HIGH)
Parameter
Read Cycle Time
Read Chip Select Setup Time
Read Address Setup Time
Read Data Output Delay Time
Read Data Hold Time
Write Cycle Time
Write Chip Select Setup Time
Write Address Setup Time
Write Data Setup Time
Write Data Hold Time
Number
Min
Typ
Max
1
50
–
–
2
0
–
–
3
15
–
–
4
–
–
15
5
0
–
–
6
50
–
–
7
10
–
–
8
10
–
–
9
10
–
–
10
0
–
–
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CPUADR[8:0]
CPUCS
Read Cycle
1
Address
2
Write Cycle
6
Address
7
CPURE
3
CPUWE
8
CPUDAT[7:0]
Valid Data
4
5
Valid Data
9
10
Figure 3-1: Host Interface Mode A Timing (CPU_SEL set HIGH)
GS1503B HD Embedded Audio CODEC
Data Sheet
37953 - 1
December 2009
14 of 90
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