HD74LS107AFPEL Ver la hoja de datos (PDF) - Renesas Electronics

Número de pieza

componentes Descripción

Lista de partido

HD74LS107AFPEL

Dual J-K Negative-edge-triggeredFlip-Flops (with Clear)

Renesas Electronics 

HD74LS107A

Electrical Characteristics

(Ta = –20 to +75 °C)

Item

Symbol

min.

typ.* max.

Unit

Condition

Input voltage

Output voltage

J, K

VIH

2.0

—

—

V

VIL

—

—

0.8

V

VOH

2.7

—

—

V

VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V,

IOH = –400 µA

VOL

—

—

—

0.5

—

0.4

V

IOL = 8 mA

IOL = 4 mA

VCC = 4.75 V, VIH = 2 V,

VIL = 0.8 V

—

—

20

Clear

IIH

—

—

60

µA VCC = 5.25 V, VI = 2.7 V

Clock

—

—

80

J, K

—

—

–0.4

Input

current

Clear

IIL

—

—

–0.8

mA VCC = 5.25 V, VI = 0.4 V

Clock

—

—

–0.8

J, K

—

—

0.1

Clear

II

—

—

0.3

mA VCC = 5.25 V, VI = 7 V

Clock

—

—

0.4

Short-circuit output

current

IOS

–20

—

–100

mA VCC = 5.25 V

Supply current**

ICC

—

4

6

mA VCC = 5.25 V

Input clamp voltage

VIk

—

—

–1.5

V

VCC = 4.75 V, IIN = –18 mA

Notes: * VCC = 5 V, Ta = 25°C

** With all outputs open, ICC is measured with the Q and Q outputs high in turn. At the tires of measurement, the

clock input is grounded.

Switching Characteristics

Item

Maximum clock frequency

Propagation delay time

Symbol

fmax

tPLH

tPHL

Inputs

Clear

Clock

(VCC = 5 V, Ta = 25°C)

Outputs min. typ. max. Unit

Condition

Q, Q

30

45

— MHz

—

15

20

ns

CL = 15 pF,

RL = 2 kΩ

—

15

20

ns

Timing Definition

tw

Clock

J, K

1.3 V

tsu

1.3 V

th

1.3 V

"H" Data

1.3 V

3V

1.3 V

0V

tsu

th

3V

"L" Data

1.3 V

0V

Rev.3.00, Jul.13.2005, page 3 of 6

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