HD74HCT374 Ver la hoja de datos (PDF) - Renesas Electronics
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HD74HCT374 Datasheet PDF : 8 Pages
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HD74HCT374, HD74HCT534
Octal D-type Flip-Flops (with 3-state outputs)
Octal D-type Flip-Flops (with inverted 3-state outputs)
REJ03D0667–0200
(Previous ADE-205-556)
Rev.2.00
Mar 30, 2006
Description
These device are positive edge triggered flip-flops. The difference between HD74HCT374 and HD74HCT534 is only
that the former is a true outputs and the latter is a false outputs. Data at the D inputs, meeting the setup and hold time
requirements, are transferred to the Q outputs on positive going transitions of the clock (CK) input. When a high logic
level is applied to the output control (OC) input, all outputs go to a high impedance state, regardless of what signals are
present at the other inputs and the state of the storage elements.
Features
• LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
• High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: VCC = 4.5 to 5.5 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HCT374P
DILP-20 pin
PRDP0020AC-B
P
(DP-20NEV)
HD74HCT374FPEL
HD74HCT534FPEL
SOP-20 pin (JEITA)
PRSP0020DD-B
(FP-20DAV)
FP
HD74HCT374RPEL
HD74HCT534RPEL
SOP-20 pin (JEDEC)
PRSP0020DC-A
(FP-20DBV)
RP
HD74HCT374TELL TSSOP-20 pin
PTSP0020JB-A
T
(TTP-20DAV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Output Control
Clock
D
L
H
L
L
L
L
X
H
X
X
Notes: 1. H; High level, L; Low level, X; Irrelevant, Z; High impedance
HD74HCT374
Q
H
L
No change
Z
HD74HCT534
Q
L
H
No change
Z
Rev.2.00 Mar 30, 2006 page 1 of 7
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