HIP0060AB Ver la hoja de datos (PDF) - Intersil

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HIP0060AB

1.5A, 50V Quad Low Side Power Driver with Serial Bus Control and Fault Protection

Intersil 

HIP0060

4.7kΩ

5V, 100µs

50Ω

2% DUTY CYCLE

FUNCTION GEN.

4.7kΩ

RST

INA

+5V VDD

INB

HIP0060

INC

(TIMING TEST

CIRCUIT)

IND

INT

OUTA

OUTB

OUTC

OUTD

GND

+14.5V

30Ω

30Ω

30Ω

30Ω

5V

VIN

0V

VOUT

14.5V

0V

3V

tON

tr

90%

10%

1V

tOFF

tf

90%

10%

FIGURE 2. INPUT TO OUTPUT SWITCHING TIME DIAGRAM FOR EACH SWITCHING CHANNEL. THE CONDITIONS SHOWN

REFER TO THE TIMING TEST CIRCUIT

10000

1000

100

SAFE OPERATING AREA

BELOW LINE

10

0.1

1

10

100

TIME (ms)

FIGURE 3. MAXIMUM SINGLE PULSE ENERGY SAFE OPERATING AREA FOR EACH CLAMPED OUTPUT DRIVER, TA = 25oC

5

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