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HEF40160BF

4-bit synchronous decade counter with asynchronous reset

Philips Electronics 

Philips Semiconductors

4-bit synchronous decade counter with

asynchronous reset

Product specification

HEF40160B

MSI

PINNING

PE

P0 to P3

CEP

CET

CP

MR

O0 to O3

TC

parallel enable input

parallel data inputs

count enable parallel input

count enable trickle input

clock input (LOW to HIGH, edge-triggered)

master reset input (active LOW)

parallel outputs

terminal count output

Fig.3 Pinning diagram.

SYNCHRONOUS MODE SELECTION

PE

CEP

CET

MODE

L

X

X

preset

H

L

X

no change

H

X

L

no change

H

H

H count

Notes

1. MR = HIGH

2. H = HIGH state (the more positive voltage)

3. L = LOW state (the less positive voltage)

4. X = state is immaterial

HEF40160BP(N): 16-lead DIL; plastic

(SOT38-1)

HEF40160BD(F): 16-lead DIL; ceramic (cerdip)

(SOT74)

HEF40160BT(D): 16-lead SO; plastic

(SOT109-1)

( ): Package Designator North America

TERMINAL COUNT GENERATION

CET

(O0 ⋅ O1 ⋅ O2 ⋅ O3)

TC

L

L

L

L

H

L

H

L

L

H

H

H

Note

1. TC = CET . O0 . O1 . O2 . O3

January 1995

Fig.4 State diagram.

4

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