HEC4031B Ver la hoja de datos (PDF) - Philips Electronics
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HEC4031B Datasheet PDF : 7 Pages
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Philips Semiconductors
64-stage static shift register
Product specification
HEF4031B
MSI
DESCRIPTION
The HEF4031B is an edge-triggered 64-stage static shift
register with two serial data inputs (DA, DB), a data select
input A/B, a clock input (CP), a buffered clock output (CO),
and buffered outputs from the 64th bit position (O63, O63).
The output O63 is capable of driving one TTL load.
Data from DA or DB, as determined by the state of A/B, is
shifted into the first shift register position and all the data in
the register is shifted one position to the right on the LOW
to HIGH transition of CP. DA is selected by a LOW, and DB
by a HIGH on A/B. Registers can be cascaded either by
connecting all CP inputs together or by driving CP of the
most right-hand register with the system clock and
connecting CO to CP of the preceding register. When the
second technique is used in the recirculating mode, a
flip-flop must be used to store O63 of the most right-hand
register until the most left-hand register is clocked.
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
PINNING
DA, DB
A/B
CP
CO
O63
O63
data inputs
data select input
clock input (LOW to HIGH edge-triggered)
buffered clock output
buffered output from the 64th stage
complementary buffered output from the 64th
stage
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
HEF4031BP(N): 16-lead DIL; plastic (SOT38-1)
HEF4031BD(F): 16-lead DIL; ceramic (cerdip) (SOT74)
HEF4031BT(D): 16-lead SO; plastic (SOT109-1)
( ): Package Designator North America
January 1995
2
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