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HM5117805LTS-5

16 M EDO DRAM (2-Mword × 8-bit) 2 k Refresh

Elpida Memory, Inc 

HM5117805 Series

DC Characteristics (Ta = 0 to +70°C, VCC = 5 V ± 10%, VSS = 0 V)

HM5117805

-5

-6

-7

Parameter

Symbol Min Max Min Max Min Max Unit Test conditions

Operating current*1, *2

Standby current

I CC1

— 110 — 100 — 90 mA

tRC = min

I CC2

— 2 — 2 — 2 mA

TTL interface

RAS, CAS = VIH

Dout = High-Z

— 1 — 1 — 1 mA

CMOS interface

RAS, CAS ≥ VCC – 0.2 V

Dout = High-Z

Standby current

(L-version)

I CC2

— 150 — 150 — 150 µA

CMOS interface

RAS, CAS ≥ VCC – 0.2 V

Dout = High-Z

RAS-only refresh current*2 ICC3

Standby current*1

I CC5

— 110 — 100 — 90 mA

— 5 — 5 — 5 mA

tRC = min

RAS = VIH

CAS = VIL

Dout = enable

CAS-before-RAS refresh

I CC6

current

— 110 — 100 — 90 mA

tRC = min

EDO page mode

current*1, *3

I CC7

— 100 — 90 — 85 mA

tHPC = min

Battery backup current*4

I CC10

(Standby with CBR refresh)

(L-version)

Self refresh mode current ICC11

(L-version)

— 500 — 500 — 500 µA

— 300 — 300 — 300 µA

CMOS interface

Dout = High-Z

CBR refresh:

tRC = 62.5 µs

tRAS ≤ 0.3 µs

CMOS interface

RAS, CAS ≤ 0.2V

Dout = High-Z

Input leakage current

I LI

Output leakage current

I LO

–10 10 –10 10 –10 10 µA

–10 10 –10 10 –10 10 µA

0 V ≤ Vin ≤ 7 V

0 V ≤ Vout ≤ 7 V

Dout = disable

Output high voltage

VOH

2.4 VCC 2.4 VCC 2.4 VCC V

High Iout = –2 mA

Output low voltage

VOL

0 0.4 0 0.4 0 0.4 V

Low Iout = 2 mA

Notes: 1. ICC depends on output load condition when the device is selected. ICC max is specified at the output

open condition.

2. Address can be changed once or less while RAS = VIL.

3. Address can be changed once or less while CAS = VIH.

4. CAS = L (≤ 0.2 V) while RAS = L (≤ 0.2 V).

Data Sheet E0156H10

6

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