HY57V641620ELT Ver la hoja de datos (PDF) - Hynix Semiconductor
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HY57V641620ELT Datasheet PDF : 13 Pages
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Synchronous DRAM Memory 64Mbit (4Mx16bit)
HY57V641620E(L/S)T(P) Series
AC CHARACTERISTICS II (AC operating conditions unless otherwise noted)
Parameter
Symbol
RAS Cycle Time Operation tRC
RAS Cycle Time Auto Refresh tRRC
RAS to CAS Delay
tRCD
RAS Active Time
tRAS
RAS Precharge Time
tRP
RAS to RAS Bank Active Delay tRRD
CAS to CAS Delay
tCCD
Write
lay
Command
to
Data-In
De-
tWTL
Data-in to Precharge Command tDPL
5
6
7
H
Unit Note
Min Max Min Max Min Max Min Max
55 - 60 - 63 - 63 - ns
55 - 60 - 63 - 63 - ns
15 - 18 - 20 - 20 - ns
38.7 100K 42 100K 42 100K 42 120K ns
15 - 18 - 20 - 20 - ns
10 - 12 - 14 - 15 - ns
1
-
1
-
1
-
1 - CLK
0
-
0
-
0
-
0 - CLK
2
-
2
-
2
-
2 - CLK
Data-In to Active Command
DQM to Data-Out Hi-Z
DQM to Data-In Mask
MRS to New Command
Precharge to Data CL = 3
Output High-Z
CL = 2
Power Down Exit Time
Self Refresh Exit Time
Refresh Time
tDAL
tDQZ
tDQM
tMRD
tPROZ3
tPROZ2
tDPE
tSRE
tREF
tDPL + tRP
2
-
2
-
2
-
2 - CLK
0
-
0
-
0
-
0 - CLK
2
-
2
-
2
-
2 - CLK
3
-
3
-
3
-
3 - CLK
2
-
2
-
2
-
2 - CLK
1
-
1
-
1
-
1 - CLK
1
-
1
-
1
-
1 - CLK 1
- 64 - 64 - 64 - 64 ms
Note: 1. A new command can be given tRRC after self refresh exit.
Rev. 1.5 / Feb. 2005
11
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