IC41C16256 Ver la hoja de datos (PDF) - Integrated Circuit Solution Inc

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IC41C16256

256K x 16 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE

Integrated Circuit Solution Inc 

IC41C16256

IC41LV16256

CBR REFRESH CYCLE (Addresses; WE, OE = DON'T CARE)

RAS

tRPC

tCP

UCAS/LCAS

I/O

tRP

tRAS

tCHR

tCSR

tRPC

tRP

tRAS

tCSR

tCHR

Open

HIDDEN REFRESH CYCLE(1) (WE = HIGH; OE = LOW)

RAS

tCRP

UCAS/LCAS

tASR

ADDRESS

Row

I/O

OE

tRAS

tRCD

tRP

tRSH

tAR

tRAD

tRAH tASC

tRAL

tCAH

Open

Column

tAA

tRAC

tCLZ

tCAC

tOE

tORD

tRAS

tCHR

tOFF(2)

Valid Data

Open

tOD

Undefined

Don’t Care

Notes:

1. A Hidden Refresh may also be performed after a Write Cycle. In this case, WE = LOW and OE = HIGH.

2. tOFF is referenced from rising edge of RAS or CAS, whichever occurs last.

Integrated Circuit Solution Inc.

19

DR018-0C 04/23/2004

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