IC41C1665
IC41LV1665
ELECTRICAL CHARACTERISTICS(1) (Recommended Operation Conditions unless otherwise noted.)
Symbol Parameter
Test Condition
Speed Min. Max. Unit
IIL
Input Leakage Current
Any input 0V ≤ VIN ≤ Vcc
Other inputs not under test = 0V
–10 10 µA
IIO
Output Leakage Current
Output is disabled (Hi-Z)
0V ≤ VOUT ≤ Vcc
–10 10 µA
VOH
Output High Voltage Level
IOH = –5 mA
2.4 —
V
VOL
Output Low Voltage Level
IOL = +4.2 mA
— 0.4
V
ICC1
Stand-by Current: TTL
RAS, LCAS, UCAS ≥ VIH
5V —
2 mA
ICC1
Stand-by Current: TTL
RAS, LCAS, UCAS ≥ VIH
3.3V —
mA
1 mA
ICC2
Stand-by Current: CMOS
ICC2
Stand-by Current: CMOS
ICC3
Operating Current:
Random Read/Write(2,3,4)
RAS, LCAS, UCAS ≥ VCC – 0.2V
RAS, LCAS, UCAS ≥ VCC – 0.2V
RAS, LCAS, UCAS,
Address Cycling, tRC = tRC (min.)
5V —
3.3V —
-25 —
-30 —
mA
1 mA
0.5 mA
170 mA
150
Average Power Supply Current
-35 — 130
ICC4
Operating Current:
RAS = VIL, LCAS, UCAS,
Fast Page Mode(2,3,4)
Cycling tPC = tPC (min.)
Average Power Supply Current
-40 — 120
-25 — 170 mA
-30 — 150
-35 — 130
ICC5
Refresh Current:
RAS-Only(2,3)
RAS Cycling, LCAS, UCAS ≥ VIH
tRC = tRC (min.)
Average Power Supply Current
-40 — 120
-25 — 170 mA
-30 — 150
-35 — 130
ICC6
Refresh Current:
RAS, LCAS, UCAS Cycling
CBR(2,3,5)
tRC = tRC (min.)
Average Power Supply Current
-40 — 120
-25 — 170 mA
-30 — 150
-35 — 130
-40 — 120
Notes:
1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper
device operation is assured.The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is
exceeded.
2. Dependent on cycle rates.
3. Specified values are obtained with minimum cycle time and the output open.
4. Column-address is changed once each fast page cycle.
5. Enables on-chip refresh and address counters.
Integrated Circuit Solution Inc.
7
DR031-0A 10/17/2001