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3BR4765J

Off-Line SMPS Current Mode Controller with integrated 650V CoolMOS ® and Startup cell (frequency jitter Mode) in DIP-8

Infineon Technologies 

CoolSET®-F3R

ICE3BR4765J

Functional Description

and FB signal is still below 1.35V, the system enters

the Active Burst Mode. This time window prevents a

sudden entering into the Active Burst Mode due to

large load jumps.

VFB

After entering Active Burst Mode, a burst flag is set and

the internal bias is switched off in order to reduce the 4.0V

current consumption of the IC to approx. 450uA.

3.5V

3.0V

It needs the application to enforce the VCC voltage

Entering

Active Burst

Mode

Leaving

Active Burst

Mode

above the Undervoltage Lockout level of 10.5V such

that the Startup Cell will not be switched on

1.35V

accidentally. Or otherwise the power loss will increase

drastically. The minimum VCC level during Active Burst

Blanking Timer

t

Mode depends on the load condition and the

20ms Blanking Time

application. The lowest VCC level is reached at no load

condition.

3.7.2.2 Working in Active Burst Mode

After entering the Active Burst Mode, the FB voltage

rises as VOUT starts to decrease, which is due to the

inactive PWM section. The comparator C6a monitors

VCS

t

the FB signal. If the voltage level is larger than 3.5V, the

internal circuit will be activated; the Internal Bias circuit

resumes and starts to provide switching pulse. In

Current limit level

Active Burst Mode the gate G10 is released and the 1.03V during Active Burst

current limit is reduced to 0.34V, which can reduce the

Mode

conduction loss and the audible noise. If the load at

VOUT is still kept unchanged, the FB signal will drop to 0.34V

3.0V. At this level the C6b deactivates the internal

circuit again by switching off the internal Bias. The gate

VVCC

t

G11 is active again as the burst flag is set after entering

Active Burst Mode. In Active Burst Mode, the FB

voltage is changing like a saw tooth between 3.0V and

3.5V (see figure 24).

3.7.2.3 Leaving Active Burst Mode

10.5V

The FB voltage will increase immediately if there is a

high load jump. This is observed by the comparator C4.

Since the current limit is app. 34% during Active Burst

IVCC

t

Mode, it needs a certain load jump to rise the FB signal

to exceed 4.0V. At that time the comparator C4 resets 2.5mA

the Active Burst Mode control which in turn blocks the

comparator C12 by the gate G10. The maximum

current can then be resumed to stabilize the VOUT.

450uA

VOUT

t

Version 2.5

t

Figure 24 Signals in Active Burst Mode

16

19 Nov 2012

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