ICS8516FYIT Ver la hoja de datos (PDF) - Integrated Circuit Systems
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ICS8516FYIT Datasheet PDF : 13 Pages
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Integrated
Circuit
Systems, Inc.
ICS8516I
LOW SKEW, 1-TO-16
DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
TABLE 4D. LVDS DC CHARACTERISTICS, VDD = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
VOD
∆ VOD
VOS
∆ VOS
IOZ
IOFF
IOSD
IOS/IOSB
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
VOS Magnitude Change
High Impedance Leakage Current
Power Off Leakage
Differential Output Short Circuit Current
Output Short Circuit Current
Minimum
250
1.125
-10
-1
Typical
400
1.4
Maximum
600
50
1.6
50
+10
+1
-5.5
-12
Units
mV
mV
V
mV
µA
µA
mA
mA
TABLE 5. AC CHARACTERISTICS, VDD = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
fMAX
tPD
tsk(o)
Output Frequency
Propagation Delay; NOTE 1
Output Skew; NOTE 2, 4
700
1.6
2.0
2.4
65
tsk(pp) Part-to-Part Skew; NOTE 3, 4
550
tR/tF
Output Rise/Fall Time
odc
Output Duty Cycle
20% to 80%
50
600
IJ 600MHz
45
55
tPZL, tPZH Output Enable Time; NOTE 5
5
tPLZ, tPHZ Output Disable Time; NOTE 5
5
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
Units
MHz
ns
ps
ps
ps
%
ns
ns
8516FYI
www.icst.com/products/hiperclocks.html
5
REV. A JULY 30, 2004
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