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ICS9148YF-12 Ver la hoja de datos (PDF) - Integrated Circuit Systems

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Lista de partido
ICS9148YF-12
ICST
Integrated Circuit Systems ICST
ICS9148YF-12 Datasheet PDF : 18 Pages
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ICS9148-12
Power-On Conditions
SEL 66/60# MODE
1
1
0
1
PIN #
38, 39, 41, 42
36, 35, 33, 32,
30, 29, 27, 26
16, 14, 13, 12,
11, 9, 8
38, 39, 41, 42
36, 35, 33, 32,
30, 29, 27, 26
16, 14, 13, 12,
11, 9, 8
26
27
8
1
0
38, 39, 41, 42
36, 35, 33, 32,
30, 29
16, 14, 13, 12,
11, 9
26
27
8
0
0
38, 39, 41, 42
36, 35, 33, 32,
30, 29
16, 14, 13, 12,
11, 9
DESCRIPTION
CPUCLKs
SDRAM
PCICLKs
CPUCLKs
SDRAM
PCICLKs
PCI_STOP#
CPU_STOP#
PCICLK_F
CPUCLKs
SDRAM
PCICLKs
PCI_STOP#
CPU_STOP#
PCICLK_F
CPUCLKs
SDRAM
PCICLKs
FUNCTION
66.6 MHz - w/serial config enable/disable
66.6 MHz - All SDRAM outputs
33.3 MHz - w/serial config enable/disable
60 MHz - w/serial config enable/disable
60 MHz - w/serial config enable/disable
30 MHz - w/serial config enable/disable
Power Management, PCI (0:5) Clocks
Stopped when low
Power Management, CPU (0:5) Clocks
Stopped when low
33.3 MHz - 33.3 MHz - PCI Clock Free running for
Power Management
66.6 MHz - CPU Clocks w/external Stop Control and
serial config individual enable/disable.
66.6 MHz - SDRAM Clocks w/serial config individual
enable/disable.
33.3 MHz - PCI Clocks w/external Stop control and
serial config individual enable/disable.
Power Management, PCI (0:5) Clocks
Stopped when low
Power Management, CPU (0:5) Clocks
Stopped when low
30 MHz - PCI Clock Free running for Power
Management
60 MHz - CPU Clocks w/external Stop control and
serial config individual enable/disable.
60 MHz - SDRAM Clocks w/serial config individual
enable/disable.
30 MHz - PCI Clocks w/external Stop control and
serial config individual enable/disable.
Example:
a) if MODE = 1, pins 26 and 27 are configured as SDRAM7 and SDRAM6 respectively.
b) if MODE = 0, pins 26 and 27 are configured as PCI_STOP# and CPU_STOP# respectively.
Power-On Default Conditions
At power-up and before device programming, all clocks will default to an enabled and “on” condition. The frequencies that are then produced
are on the MODE pin as shown in the table below.
CLOCK
REF (0:1)
IOAPIC 0
48/24 MHz
DEFAULT CONDITION AT POWER-UP
14.31818 MHz
14.31818 MHz
48 MHz
3

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