AV9248-73 Ver la hoja de datos (PDF) - Integrated Circuit Systems

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AV9248-73

Frequency Timing Generator for Pentium II Systems

Integrated Circuit Systems 

ICS9248 - 73

Group Offset Waveforms

Group Skews at common Transition Edges

TA = 0 - 70º C; Supply Voltage VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5% (unless otherwise stated)

CL = 20 pF for CPU and IOAPIC

CL = 50 pF for PCI0 & PCI1, CL = 30 pF for other PCIs, SDRAM and 3V66

GROUP

SYMBOL

CONDITIONS

MIN TYP

CPU to SDRAM

tCPU-SDRAM VT = 1.5 V; VTL = 1.25 V

SDRAM leads CPU by 2.5ns for CPU66

CPU leads SDRAM by 5.0ns for CPU100

0

100

CPU to 3V66

tCP U -3 V6 6

VT = 1.5 V; VTL = 1.25 V

CPU leads 3V66 by 7.5ns for CPU66

CPU leads 3V66 by 0.0ns for CPU100

0

100

IOAPIC to PCI

3V66 to PCI

tIOAPIC-PCI VT = 1.5 V; VTL = 1.25 V

t3V66-PCI VT = 1.5 V

0

360

1.5 2.5

Guaranteed by design, not 100% tested in production.

MAX UNITS

500 ps

500 ps

500 ps

4

ns

11

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