IDT29FCT2520CT Ver la hoja de datos (PDF) - Integrated Device Technology
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IDT29FCT2520CT Datasheet PDF : 7 Pages
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IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
tPHL
tPLH
tPHL
tPLH
tSU
tH
tSU
tH
tPHZ
tPLZ
tPZH
tPZL
tW
Parameter
Propagation Delay
CLK to Yn
Propagation Delay
S0 or S1 to Yn
Set-up Time, HIGH or LOW
Dn to CLK
Hold Time, HIGH or LOW
Dn to CLK
Set-up Time, HIGH or LOW
I0 or I1 to CLK
Hold Time, HIGH or LOW
I0 or I1 to CLK
Output Disable Time
Output Enable Time
Clock Pulse Width
HIGH or LOW
Condition(1)
CL = 50pF
RL = 500Ω
FCT520AT/521AT
Com'l.
Mil.
Min.(2) Max. Min.(2) Max.
FCT520BT/521BT
Com'l.
Mil.
Min.(2) Max. Min.(2) Max.
Unit
2.0 14.0 2.0 16.0 2.0 7.5 2.0 8.0 ns
2.0 13.0 2.0 15.0 2.0 7.5 2.0 8.0 ns
5.0 — 6.0 — 2.5 — 2.8 — ns
2.0 — 2.0 — 2.0 — 2.0 — ns
5.0 — 6.0 — 4.0 — 4.5 — ns
2.0 — 2.0 — 2.0 — 2.0 — ns
1.5 12.0 1.5 13.0 1.5 7.0 1.5 7.5 ns
1.5 15.0 1.5 16.0 1.5 7.5 1.5 8.0 ns
7.0 — 8.0 — 5.5 — 6.0 — ns
2619 tbl 07
FCT520CT/521CT
Com'l.
Symbol
Parameter
Condition(1) Min.(2) Max.
tPHL
Propagation Delay
tPLH
CLK to Yn
CL = 50pF
RL = 500Ω
2.0 6.0
tPHL
Propagation Delay
tPLH
S0 or S1 to Yn
2.0 6.0
tSU
Set-up Time, HIGH or LOW
Dn to CLK
2.5 —
tH
Hold Time, HIGH or LOW
Dn to CLK
2.0 —
tSU
Set-up Time, HIGH or LOW
I0 or I1 to CLK
4.0 —
tH
Hold Time, HIGH or LOW
I0 or I1 to CLK
2.0 —
tPHZ
Output Disable Time
tPLZ
1.5 6.0
tPZH
Output Enable Time
tPZL
1.5 6.0
tW
Clock Pulse Width
HIGH or LOW(3)
5.5 —
NOTES:
1. See test circuit and waveforms.
2. Minimum units are guaranteed but not tested on Propagation Delays.
Mil.
Min.(2) Max.
2.0 7.0
2.0 7.0
2.8 —
2.0 —
4.5 —
2.0 —
1.5 6.0
1.5 7.0
6.0 —
FCT520DT/521DT
Com'l.
Mil.
Min.(2) Max. Min.(2) Max.
Unit
2.0 5.2
—
— ns
2.0 4.8
—
— ns
1.5
—
—
— ns
1.0
—
—
— ns
2.0
—
—
— ns
1.0
—
—
— ns
1.5 4.8
—
— ns
1.5 4.0
—
— ns
3.0
—
—
— ns
2619 tbl 08
6.2
5
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