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WS512K16-45DLI Ver la hoja de datos (PDF) - White Electronic Designs => Micro Semi

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WS512K16-45DLI
White-Electronic
White Electronic Designs => Micro Semi White-Electronic
WS512K16-45DLI Datasheet PDF : 6 Pages
1 2 3 4 5 6
WS512K16-XXX
512Kx16 SRAM MODULE ADVANCED*
FEATURES
s Access Times 17, 20, 25, 35ns
s MIL-STD-883 Compliant Devices Available
s Packaging
•44 pin Ceramic SOJ (Package 102)
• 44 lead Ceramic Flatpack (Package 209)
s Organized as two banks of 256Kx16
s Data Byte Control:
Lower Byte (LB) = I/O1-8
Upper Byte (UB) = I/O9-16
s Data I/O Compatible with 3.3V devices
s 2V Minimum Data Retention for battery back up operation
s Commercial, Industrial and Military Temperature Range
s 5 Volt Power Supply (3.3V parts also available)
s Low Power CMOS
s TTL Compatible Inputs and Outputs
* This data sheet describes a product that may or may not be under
development and is subject to change or cancellation without notice.
3
PIN CONFIGURATION FOR WS512K16-XXX
44 CSOJ
44 FLATPACK
TOP VIEW
A0 1
A1 2
A2 3
A3 4
A4 5
CS1 6
I/O1 7
I/O2 8
I/O3 9
I/O4 10
VCC 11
GND 12
I/O5 13
I/O6 14
I/O7 15
I/O8 16
WE 17
A5 18
A6 19
A7 20
A8 21
A9 22
44 A17
43 A16
42 A15
41 OE
40 UB
39 LB
38 I/O16
37 I/O15
36 I/O14
35 I/O13
34 GND
33 VCC
32 I/O12
31 I/O11
30 I/O10
29 I/O9
28 CS2
27 A14
26 A13
25 A12
24 A11
23 A10
PIN DESCRIPTION
A0-17
LB
UB
I/O1-16
CS1-2
OE
WE
VCC
GND
NC
Address Inputs
Lower-Byte Control (I/O1-8)
Upper-Byte Control (I/O9-16)
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
No Connection
BLOCK DIAGRAM
A0-17
WE
OE
UB
LB
256K x 16
256K x 16
CS1
CS2
I/O1-16
April 1998
1
White Microelectronics • Phoenix, AZ • (602) 437-1520

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