20.0
16.0
Max.
12.0
Typ.
8.0
4.0
0.0
-50
-25
0
25
50
75
Temperature (°C)
100
125
Figure 13A. CS to ERR Pull-Up vs. Temperature
5.00
4.00
3.00
Min.
2.00
1.00
0.00
-50
-25
0
25
50
75
Temperature (°C)
100
125
Figure 14A. Logic “1” Input Threshold vs. Tempera-
ture
5.00
4.00
3.00
2.00
1.00 Max.
0.00
-50
-25
0
25
50
75
Temperature (°C)
100
125
Figure 15A. Logic “0” Input Threshold vs. Tempera-
ture
www.irf.com
IR2125Z
20.0
16.0
12.0
Max.
T yp.
8.0
4.0
0.0
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Figure 13B. CS to ERR Pull-Up vs. Voltage
5.00
4.00
3.00
Min.
2.00
1.00
0.00
10
12
14
16
18
20
VCC Logic Supply Voltage (V)
Figure 14B. Logic “1” Input Threshold vs. Voltage
5.00
4.00
3.00
2.00
1.00 Max.
0.00
10
12
14
16
18
20
VCC Logic Supply Voltage (V)
Figure 15B. Logic “0” Input Threshold vs. Voltage
7