M5M4V4S40CTP-15 Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC
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M5M4V4S40CTP-15 Datasheet PDF : 45 Pages
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SDRAM (Rev. 0.3)
Feb ‘97 Preliminary
MITSUBISHI LSIs
M5M4V4S40CTP-12, -15
4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
COMMAND TRUTH TABLE
COMMAND
CKE CKE
MNEMONIC
/CS /RAS /CAS /WE BA
n-1 n
Deselect
DESEL
H
X
H
X
X
X
X
No Operation
NOP
H
X
L
H
H
H
X
Row Address Entry &
Bank Activate
ACT
H
X
L
L
H
H
V
Single Bank Precharge
PRE
H
X
L
L
H
L
V
Precharge All Banks
PREA
H
X
L
L
H
L
X
Column Address Entry
& Write
WRITE
H
X
L
H
L
L
V
Column Address Entry
& Write with Auto-
WRITEA
H
X
L
H
L
L
V
Precharge
Column Address Entry
& Read
Column Address Entry
& Read with Auto-
Precharge
READ
READA
H
X
L
H
L
H
V
H
X
L
H
L
H
V
Auto-Refresh
Self-Refresh Entry
Self-Refresh Exit
Burst Terminate
Mode Register Set
REFA
REFS
REFSX
TBST
MRS
H
H
L
L
L
H
X
H
L
L
L
L
H
X
L
H
H
X
X
X
X
L
H
L
H
H
H
X
H
X
L
H
H
L
X
H
X
L
L
L
L
V
A8 A0-7
X
X
X
X
V
V
L
X
H
X
L
V
H
V
L
V
H
V
X
X
X
X
X
X
X
X
X
X
L V*1
H=High Level, L=Low Level, V=Valid, X=Don’t Care, n=CLK cycle number
NOTE:
1. A7 =0, A0-A6 =Mode Address
MITSUBISHI ELECTRIC
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