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IRS2110 Ver la hoja de datos (PDF) - International Rectifier

Número de pieza
componentes Descripción
Lista de partido
IRS2110
IR
International Rectifier IR
IRS2110 Datasheet PDF : 19 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
PRELIMINARY
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figs. 28 through 35.
Symbol
Definition
Min.
Max. Units
VB
High side floating supply voltage
(IRS2110)
(IRS2113)
-0.3
520 (Note 1)
-0.3
620 (Note 1)
VS
VHO
VCC
VLO
VDD
VSS
VIN
dVs/dt
PD
High side floating supply offset voltage
High side floating output voltage
Low side fixed supply voltage
Low side output voltage
Logic supply voltage
Logic supply offset voltage
Logic input voltage (HIN, LIN, & SD)
Allowable offset supply voltage transient (Fig. 2)
(14 lead DIP)
Package power dissipation @ TA +25 °C (16 lead SOIC)
VB - 20
VS - 0.3
-0.3
-0.3
-0.3
VCC - 20
VSS - 0.3
VB + 0.3
VB + 0.3
20 (Note 1)
VCC + 0.3
VSS+20 (Note 1)
VCC + 0.3
VDD + 0.3
50
1.6
1.25
V
V/ns
W
(14 lead DIP)
RTHJA
Thermal resistance, junction to ambient
(16 lead SOIC)
75
°C/W
100
TJ
Junction temperature
150
TS
Storage temperature
-55
150
°C
TL
Lead temperature (soldering, 10 seconds)
300
Note 1: All supplies are fully tested at 25 V, and an internal 20 V clamp exists for each supply.
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation, the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at a 15 V differential.
Typical ratings at other bias conditions are shown in Figs. 36 and 37.
Symbol
Definition
Min.
Max. Units
VB
High side floating supply absolute voltage
(IRS2110)
VS
High side floating supply offset voltage
(IRS2113)
VS + 10
Note 2
Note 2
VS + 20
500
600
VHO
High side floating output voltage
VS
VB
VCC
Low side fixed supply voltage
10
20
V
VLO
Low side output voltage
0
VCC
VDD
Logic supply voltage
VSS + 3
VSS + 20
VSS
Logic supply offset voltage
-5 (Note 3)
5
VIN
Logic input voltage (HIN, LIN & SD)
VSS
VDD
TA
Ambient temperature
-40
125
°C
Note 2: Logic operational for VS of -4 V to +500 V. Logic state held for VS of -4 V to -VBS. (Refer to the Design Tip DT97-3)
Note 3: When VDD < 5 V, the minimum VSS offset is limited to -VDD.
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