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IS61LV25616

256 X 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

Integrated Circuit Solution Inc 

IS61LV25616

CAPACITANCE(1)

Symbol

CIN

COUT

Parameter

Input Capacitance

Input/Output Capacitance

Conditions

VIN = 0V

VOUT = 0V

Max.

Unit

6

pF

8

pF

Note:

1. Tested initially and after any design or process changes that may affect these parameters.

READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)

Symbol Parameter

tRC Read Cycle Time

tAA Address Access Time

tOHA Output Hold Time

tACE CE Access Time

tDOE OE Access Time

tHZOE  OE to High-Z Output

tLZOE  OE to Low-Z Output

tHZCE CE to High-Z Output

tLZCE  CE to Low-Z Output

tBA LB, UB Access Time

tHZB LB, UB to High-Z Output

tLZB LB, UB to Low-Z Output

-8

Min. Max.

8—

—8

3—

—8

—4

04

0—

04

3—

—4

04

0—

-10

Min. Max.

10 —

— 10

3—

— 10

—5

—5

0—

05

3—

—5

05

0—

-12

Min. Max.

12 —

— 12

3—

— 12

—6

—6

0—

06

3—

—6

06

0—

-15

Min. Max. Unit

15 — ns

— 15 ns

3 — ns

— 15 ns

— 7 ns

0 6 ns

0 — ns

0 6 ns

3 — ns

— 7 ns

0 6 ns

0 — ns

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of

0 to 3.0V and output loading specified in Figure 1a.

2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3. Not 100% tested.

AC TEST CONDITIONS

Parameter

Input Pulse Level

Input Rise and Fall Times

Input and Output Timing

and Reference Level

Output Load

Unit

0V to 3.0V

3 ns

1.5V

See Figures 1 and 2

Notes:

1. The Vcc operating range for 8 ns is 3.3V +10%, -5%.

AC TEST LOADS

3.3V

319 Ω

3.3V

319 Ω

OUTPUT

30 pF

Including

jig and

scope

Figure 1

353 Ω

4

OUTPUT

5 pF

Including

jig and

scope

Figure 2

353 Ω

Integrated Circuit Solution Inc.

SR040-0C

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