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IS61LV6432(1998) Ver la hoja de datos (PDF) - Integrated Circuit Solution Inc

Número de pieza
componentes Descripción
Lista de partido
IS61LV6432
(Rev.:1998)
ICSI
Integrated Circuit Solution Inc ICSI
IS61LV6432 Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
IS61LV6432
ISSI ®
SNOOZE AND RECOVERY CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)
Symbol Parameter
-166
-133
-117
-5
-6
-7
-8
Min. Max Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
tKC Cycle Time
6 — 7.5 — 8.5 — 10 — 12 — 13 — 15 — ns
tKH Clock High Time
2.4 — 2.8 — 3.0 — 3.5 — 4 — 6 — 6 — ns
tKL Clock Low Time
2.4 — 2.8 — 3.0 — 3.5 — 4 — 6 — 6 — ns
tKQ Clock Access Time
— 5 — 5 — 5 — 5 — 6 — 7 — 8 ns
tKQX(4) Clock High to Output Invalid
1.5 — 1.5 — 1.5 — 1.5 — 1.5 — 2 — 2 — ns
tKQLZ(4,5) Clock High to Output Low-Z
0 — 0 — 0 — 0 — 0 — 0 — 0 — ns
tKQHZ(4,5) Clock High to Output High-Z
1.5 5 1.5 5 1.5 6 1.5 6 1.5 6
26
2 6 ns
tOEQ Output Enable to Output Valid — 5 — 5 — 5 — 5 — 6 — 6 — 6 ns
tOEQX(4) Output Disable to Output Invalid 0 — 0 — 0 — 0 — 0 — 0 — 0 — ns
tOELZ(4,5) Output Enable to Output Low-Z 0 —
0—
0—
0—
0—
0—
0 — ns
tOEHZ(4,5) Output Disable to Output High-Z — 3
—3
—4
—4
—5
—6
—6
ns
tAS Address Setup Time
2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — ns
tSS Address Status Setup Time
2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — ns
tCES Chip Enable Setup Time
2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — ns
tAH Address Hold Time
2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — ns
tSH Address Status Hold Time
2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — ns
tCEH Chip Enable Hold Time
2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — 2.5 — ns
tZZS ZZ Standby(1)
2 — 2 — 2 — 2 — 2 — 2 — 2 — cyc
tZZREC ZZ Recovery(2)
2 — 2 — 2 — 2 — 2 — 2 — 2 — cyc
Notes:
1. The assertion of ZZ allows the SRAM to enter a lower power state than when deselected within the time specified. Data
retention is guaranteed when ZZ is asserted and clock remains active.
2. ADSC and ADSP must not be asserted for at least 2 cyc after leaving ZZ state.
3. Configuration signal MODE is static and must not change during normal operation.
4. Guaranteed but not 100% tested. This parameter is periodically sampled.
5. Tested with load in Figure 2.
14
Integrated Silicon Solution, Inc.
PRELIMINARY SR018-1C
06/01/98

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