Philips Semiconductors
ISP1160
Embedded USB Host Controller
9397 750 11371
Product data
Table 2: Pin description for LQFP64…continued
Symbol[1]
Pin Type Description
DACK_N
27 I
TEST_HIGH 28 -
HC DMA acknowledge input; when not in use, this pin must
be connected to VCC via an external 10 kΩ resistor
this pin must be connected to VCC via an external 10 kΩ
resistor
INT
29 O
HC interrupt output; programmable level, edge triggered
and polarity; see Section 10.4.1
n.c.
30 -
no connection; leave this pin open
n.c.
31 O
no connection; leave this pin open
RESET_N
32 I
reset input (Schmitt trigger); a LOW level produces an
asynchronous reset (internal pull-up resistor)
NDP_SEL
33 I
indicates to the HC software the Number of Downstream
Ports (NDP) present:
EOT
34 I
DGND
35 -
n.c.
36 -
TEST_LOW 37 -
n.c.
38 -
TEST_LOW 39 -
H_WAKEUP 40 I
n.c.
41 -
H_SUSPEND 42 O
XTAL1
43 I
XTAL2
44 O
DGND
45 -
H_PSW1_N 46 O
H_PSW2_N 47 O
0 — select 1 downstream port
1 — select 2 downstream ports
only changes the value of the NDP field in the
HcRhDescriptorA register; both ports will always be
enabled; see Section 10.3.1
(internal pull-up resistor)
DMA master device to inform the ISP1160 of end of DMA
transfer; active level is programmable; when not in use, this
pin must be connected to VCC via an external 10 kΩ
resistor; see Section 10.4.1
digital ground
no connection; leave this pin open
this pin must be connected to DGND via an external 10 kΩ
resistor
no connection; leave this pin open
this pin must be connected to DGND via a 1 MΩ resistor
HC wake-up input; generates a remote wake-up from the
suspend state (active HIGH); when not in use, this pin must
be connected to DGND via an external 10 kΩ resistor
(internal pull-down resistor)
no connection; leave this pin open
HC suspend state indicator output; active HIGH
crystal input; connected directly to a 6 MHz crystal; when
this pin is connected to an external clock source,
pin XTAL2 must be left open
crystal output; connected directly to a 6 MHz crystal; when
pin XTAL1 is connected to an external clock source, this
pin must be left open
digital ground
power switching control output for downstream port 1;
open-drain output
power switching control output for downstream port 2;
open-drain output
Rev. 04 — 04 July 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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