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ISP1520

Hi-Speed Universal Serial Bus hub controller

Philips Electronics 

Philips Semiconductors

ISP1520

Hi-Speed USB hub controller

9397 750 11689

Product data

The detection of any non-removable port sets the hub descriptor into a compound

hub.

Table 8: Non-removable port pin configuration

AMBn_N (n = 1 to 4)

Non-removable port

Ground

non-removable

Pull-up with amber LED

removable

9.1.5 Port indicator support

The port indicator support can be disabled by grounding all green port indicators (all

pins GRNn_N); see Table 9. This is a global feature. It is not possible to disable port

indicators for only one port.

Table 9: Port indicator support: pin configuration

GRN1_N to GRN4_N

Port indicator support

Ground

not supported

LED pull-up green LED for at least one port supported

9.2 Device descriptors and string descriptors settings using I2C-bus

9.2.1 Background information on I2C-bus

The I2C-bus is suitable for bi-directional communication between ICs or modules. It

consists of two bi-directional lines: SDA for data signals and SCL for clock signals.

Both these lines must be connected to a positive supply voltage through a pull-up

resistor.

The basic I2C-bus protocol is defined as:

• Data transfer is initiated only when the bus is not busy.

• Changes in the data line occur when the clock is LOW and must be stable when

the clock is HIGH. Any changes in data lines when the clock is HIGH will be

interpreted as control signals.

Different conditions on I2C-bus: The I2C-bus protocol defines the following

conditions:

Not busy — both SDA and SCL remain HIGH

START — a HIGH-to-LOW transition on SDA, while SCL is HIGH

STOP — a LOW-to-HIGH transition on SDA, while SCL is HIGH

Data valid — after a START condition, data on SDA must be stable for the duration of

the HIGH period of SCL.

Data transfer: The master initiates each data transfer using a START condition and

terminates it by generating a STOP condition. To facilitate the next byte transfer, each

byte of data must be acknowledged by the receiver. The acknowledgement is done by

pulling the SDA line LOW on the ninth bit of the data. An extra clock pulse needs to

be generated by the master to accommodate this bit.

For more detailed information on the operation of the bus, refer to The I2C-bus

specification.

Rev. 02 — 04 May 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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