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K4S640432D-TC Ver la hoja de datos (PDF) - Samsung

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K4S640432D-TC Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
K4S640432D
CMOS SDRAM
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
Parameter
Symbol
Test Condition
Operating current
(One bank active)
Burst length = 1
ICC1 tRC tRC(min)
IO = 0 mA
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
ICC2P CKE VIL(max), tCC = 10ns
ICC2PS CKE & CLK VIL(max), tCC =
ICC2N
CKE VIH(min), CS VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2NS
CKE VIH(min), CLK VIL(max), tCC =
Input signals are stable
Active standby current in
power-down mode
Active standby current in
non power-down mode
(One bank active)
ICC3P CKE VIL(max), tCC = 10ns
ICC3PS CKE & CLK VIL(max), tCC =
ICC3N
CKE VIH(min), CS VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC3NS
CKE VIH(min), CLK VIL(max), tCC =
Input signals are stable
Version
Unit Note
- 75 - 80 - 1H - 1L -10
70 70 65 65 65 mA 1
1
mA
1
15
mA
6
3
mA
3
25
mA
15
Operating current
(Burst mode)
Refresh current
Self refresh current
IO = 0 mA
ICC4
Page burst
4Banks Activated
tCCD = 2CLKs
ICC5 tRC tRC(min)
ICC6 CKE 0.2V
100 95 80 80 80 mA 1
135 135 125 125 125 mA 2
C
1
mA 3
L
400
uA 4
Notes : 1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S640432D-TC**
4. K4S640432D-TL**
5. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ)
Rev. 0.0 Jun. 1999

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