LAN91C100 Ver la hoja de datos (PDF) - SMSC -> Microchip

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LAN91C100

FEAST™ Fast Ethernet Controller

SMSC -> Microchip 

DATA STRUCTURES AND REGISTERS

PACKET FORMAT IN BUFFER MEMORY

The packet format in memory is similar for the

Transmit and Receive areas. The first word is

reserved for the status word, the next word is

used to specify the total number of bytes, and it

is followed by the data area. The data area

holds the packet itself.

bit 15

bit 0

RAM

OFFSET

(Decimal)

0

STATUS WORD

2

RESERVED

4

BYTE COUNT

DATA AREA

2046 Max

CONTROL BYTE

LAST DATA BYTE (if odd)

STATUS WORD

BYTE COUNT

DATA AREA

CONTROL BYTE

FIGURE 4 – DATA PACKET FORMAT

TRANSMIT PACKET

Written by CSMA upon transmit

completion (see Status

Register)

Written by CPU

Written/modified by CPU

Written by CPU to control

odd/even data bytes

RECEIVE PACKET

Written by CSMA upon receive

completion (see RX Frame

Status Word)

Written by CSMA

Written by CSMA

Written by CSMA; also has

odd/even bit

18

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