LAN91C100-FD Ver la hoja de datos (PDF) - SMSC -> Microchip

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LAN91C100-FD

FEAST Fast Ethernet Controller with Full Duplex Capability

SMSC -> Microchip 

FEAST Fast Ethernet Controller with Full Duplex Capability

LCLK

nDATACS

W/nR

READ DATA

nRDYRTN

nCYCLE

t12

t13

t17

t19

a

b

c

t15

t14

t17

Figure 9.5 - Burst Read Cycles - nVLBUS=1

PARAMETER

t12 nDATACS Setup to Either nCYCLE or W/nR Falling

t13 nDATACS Hold after Either nCYCLE or W/nR Rising

t14 nRDYRTN Setup to LCLK Falling

t15 nRDYRTN Hold after LCLK Falling

t17 nCYCLE High and W/nR High Overlap

t19 Data Delay from LCLK Rising (Read)

Note 9.1 (holdt.)

Note 9.2 (Setupt.)

MIN

60

30

15

2

50

5

(Note

9.1)

TYP

MAX

38

(Note

9.2)

UNITS

ns

ns

ns

ns

ns

ns

SMSC DS – LAN91C100FD Rev. D

Page 71

DATASHEET

Rev. 01-20-06

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