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LAN91C111-NU

10/100 Non-PCI Ethernet Single Chip MAC + PHY

SMSC -> Microchip 

10/100 Non-PCI Ethernet Single Chip MAC + PHY

Datasheet

MII External

Signals

EEPROM

CONTROL

100BASE-TX

TRANSMITTER

TXD[3:0]

4B5B

ENCODER

SCRAMBLER

MLT3

ENCODER

SWITCHED

CURRENT

SOURCE

LP

FILTER

+

-

TX_ER

TXEN100

TX25

CLOCK

GEN

(PLL)

10BASE-T

TRANSMITTER

MANCHESTER

ROM

DAC

LP

+

FILTER

-

CRS100

COL100

COLLISION

RXD[3:0]

RX_ER

RX_DV

RX25

MII

SERIAL

Manage

-ment

MDI

MCLK

MDO

MII

CLOCK

GEN

(PLL)

SQUELCH

4B5B

DECODER

DESCRAMBL

ER

CLOCK &

DATA

RECOVERY

AUTO

NEGOTIATION

& LINK

SQUELCH

CLOCK &

DATA

Recovery

(Manchester

Decoder)

Power

On

Reset

PHY

CONTROLS

AUTONEG

LOGIC

100BASE-TX

RECEIVER

MLT

ENCODER

+/- Vth

ADAPTIVE

EQUALIZER

10BASE-T

RECEIVER

+/- Vth

LP

FILTER

nPLED[0-5]

LED

Control

LS[2-0]A

Multiplexer

S1

D

S

8

C1

C2

C3

EN

B

Multiplexer

S1

D

S8

C1

C2

C3

EN

B

LS[2-0]B

Figure 3.3 LAN91C111 Physical Layer to Internal MAC Block Diagram

RBIAS

TPO+

TPO-

TPI+

TPI-

LEDA

LED

SMSC LAN91C111 REV C

13

DATASHEET

Revision 1.91 (08-18-08)

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