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LAN91C95

ISA/PCMCIA Full Duplex Single-Chip Ethernet and Modem Controller with RAM

SMSC -> Microchip 

Mbps, while the decoder will recover the receive

clock and decode received data.

Carrier and Collision detection signals are also

handled by this block and relayed to the CSMA/CD

block.

The encoder/decoder block can interface the

network through the AUI interface pairs or it can be

programmed to use the internal 10BASE-T

transceiver and connect to a twisted pair network.

The twisted pair interface takes care of the medium

dependent signaling for 10BASE-T type of

networks. It is responsible for line interface (with

external pulse transformers and pre-distortion

resistors), collision detection as well as the link

integrity test function.

The LAN91C95 provides a 16 bit data path into

RAM. The RAM is private and can only be

accessed by the system via the arbiter. RAM

memory is managed by the MMU. Byte and word

accesses to the RAM are supported.

If the system to SRAM bandwidth is insufficient, the

LAN91C95 will automatically use its IOCHRDY line

for flow control. However, for ISA buses,

IOCHRDY will never be negated.

Modem Interface

LAN91C95 provides seemless interface to the

Lucent HSM288xCF and Rockwell ACL and

ACFL series modems. The controller provides

all PCMCIA 5.0 registers needed to support the

modem function. These registers include

support for:

1. Function Enable/Disable

2. Power Down/Up

3. Function Reset

4. Modem Ready/Busy indication

5. Data Bus Access Width

6. I/O Base Select

7. I/O Access Range

8. Interrupt Enable

9. Wake up events ‘Status Change’

information and routing to nSTSCHG pin

10. Audio Path Mute Control

Among other functions, the LAN91C95 also

provides Power-On Reset to the modem. The

data sheet specifies 0.1mF capacitor and

180KW resistor at the nMPDOUT pin assuming

a minimum of 15msec modem reset - required

for the modem. The duration of this POR can

be changed with the RC value connected with

the LAN91C95 nMPDOUT pin.

The LAN91C95 decodes the host address bus

and asserts chip select for the specified modem

I/O range provided the function is enabled and

powered up. The modem chips’ internal

registers are accessed via the I/O interface only.

PCMCIA registers for the modem, however, can

be accessed via the PCMCIA configuration

memory space or the LAN91C95 control

registers I/O space through Bank 5.

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