LAN91C96 Ver la hoja de datos (PDF) - SMSC -> Microchip
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Lista de partido
LAN91C96 Datasheet PDF : 125 Pages
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Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
A0-9,A15
nREG
nCE1,nCE2
nIORD
D0-15
nINPACK
t51
t47
valid
t48
t52
t49
t50
t20
t53
valid
t46
t46
Parameter
t46 nIORD to INPACK Delay
t47 nREG Low to Control Active
t48 nCE1,nCE2 Setup to Control Active
t20 Cycle Time (No Wait States)
t49 nREG Hold after Control Active
t50 nCE1,nCE2 Hold after Control Inactive
t51 Address Setup to Control Active
t52 Address Hold after Control Inactive
t53 nIORD Active to Data Valid
min
typ
max
units
0
35
ns
5
ns
5
ns
185
ns
0
ns
15
ns
25
ns
15
ns
0
40
ns
Figure 12.3 - PCMCIA Consecutive Read Cycles
SMSC DS – LAN91C965v&3v
Page 101
DATASHEET
Rev. 09/10/2004
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