LAN91C96 Ver la hoja de datos (PDF) - SMSC -> Microchip

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LAN91C96

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

SMSC -> Microchip 

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

COLLP

COLLN

t42

t43

COL

(internal)

Parameter

t42 Collision Turn On Delay

t43 Collision Turn Off Delay

min

typ

max

units

50

ns

350

ns

Figure 12.24 – Collision Timing (AUI)

ADDRESS

POINTER

REGISTER

nIOWR

t44

nIORD

DATA

REGISTER

IO C H R DY /

nWAIT (Z)

P a r a me te r

min

typ

t44 Pointer Register Reloaded to a Word of Data

Prefetched into Data Register

2 * t20

max

units

ns

Note: If t44 is not met, IOCHRDY will be negated for the required time. This parameter can be ignored if

IOCHRDY is connected to the system.

Figure 12.25 – Memory Read Timing

SMSC DS – LAN91C965v&3v

Page 121

DATASHEET

Rev. 09/10/2004

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