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LAN91C96

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

SMSC -> Microchip 

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

PIN NO.

TQFP

QFP

91

93

94

96

95

97

83

85

82

84

77

79

76

78

81

83

80

82

85

87

84

86

75

77

73

75

PIN NAME

nEN16

XTAL1

XTAL2

RECP/

RECN

TXP/nCOLL

TXN/nCRS

COLP

COLN

TPERXP

TPERXN

TPETXP

TPETXN

TYPE

I with

pullup

**

Iclk

**

Iclk

Diff. Input

**

Diff.

Output

I

**

Diff.

Input

**

Diff.

Input

**

Diff.

Output

DESCRIPTION

Input. When low the LAN91C96 is configured for 16 bit

bus operation. If left open the LAN91C96 works in 8 bit

bus mode. 16 bit configuration can also be

programmed via serial EEPROM or software

initialization of the CONFIGURATION REGISTER.

An external parallel resonance 20MHz crystal should

be connected across these pins. If an external clock

source is used, it should be connected to this pin

(XTAL1) and XTAL2 should be left open.

An external parallel resonance 20MHz crystal should

be connected across these pins. If an external clock

source is used, it should be connected to XTAL1 and

this pin (XTAL2) should be left open.

AUI receive differential inputs.

INTERNAL ENDEC - (nXENDEC pin open). In this

mode TXP and TXN are the AUI transmit differential

outputs. They must be externally pulled up using 150

ohm resistors.

EXTERNAL ENDEC - (nXENDEC pin tied low). In this

mode the pins are inputs used for collision and carrier

sense functions.

AUI collision differential inputs. A collision is indicated

by a 10MHz signal at this input pair.

10BASE-T receive differential inputs.

INTERNAL ENDEC - 10BASE-T transmit differential

outputs.

72

74

TPETXDP

74

76

TPETXDN

66

68

PWRDWN/

TXCLK

88

90

RBIAS

90

92

nXENDEC

11,19,

48,59,

98,38

71,79,

89

13,21,40,

50,

61,100

73,81,

91

VDD

AVDD

Diff.

Output

I with

pullup

**

Analog

Input

I with

pullup

**

10BASE-T delayed transmit differential outputs. Used

in combination with TPETXP and TPETXN to generate

the 10BASE-T transmit pre-distortion.

INTERNAL ENDEC - Powerdown input. It keeps the

LAN91C96 in powerdown mode when high (open).

Must be low for normal operation.

EXTERNAL ENDEC - Transmit clock input from

external ENDEC.

A resistor should be connected between this pin and

analog ground to determine the receive threshold

voltage of TX Receive, AUI Receive, AUI Collision

Receive, and AUI transmit voltage.

When tied low the LAN91C96 is configured for

EXTERNAL ENDEC. When tied high or left open the

LAN91C96 will use its internal encoder/decoder.

+5V power supply pins or 3.3V power supply pins

(Revisions E and later)

+5V analog power supply pins or 3.3V power supply

pins (Revisions E and later)

SMSC LAN91C965v&3v

Page 19

DATASHEET

Rev. 09/10/2004

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