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LAN8187I Ver la hoja de datos (PDF) - SMSC -> Microchip

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LAN8187I Datasheet PDF : 72 Pages
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±15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWRTM
Datasheet
SIGNAL NAME
CRS
RX_DV
SPEED100/
PHYAD0
LINK/
PHYAD1
ACTIVITY/
PHYAD2
FDUPLEX/
PHYAD3
Table 3.2 LED Signals
TYPE
O
O
I/O
I/O
I/O
I/O
DESCRIPTION
Carrier Sense: Indicates detection of carrier.
Receive Data Valid: Indicates that recovered and decoded data
nibbles are being presented on RXD[3:0].
Note: This signal is not used in RMII Mode.
LED1 – SPEED100 indication. Active indicates that the selected
speed is 100Mbps. Inactive indicates that the selected speed is
10Mbps.
Note: This signal is mux’d with PHYAD0
LED2 – LINK ON indication. Active indicates that the Link
(100Base-TX or 10Base-T) is on.
Note: This signal is mux’d with PHYAD1
LED3 – ACTIVITY indication. Active indicates that there is
Carrier sense (CRS) from the active PMD.
Note: This signal is mux’d with PHYAD2
LED4 – DUPLEX indication. Active indicates that the PHY is in
full-duplex mode.
Note: This signal is mux’d with PHYAD3
SIGNAL NAME
MDIO
MDC
Table 3.3 Management Signals
TYPE
I/O
I
DESCRIPTION
Management Data Input/OUTPUT: Serial management data
input/output.
Management Clock: Serial management clock.
SIGNAL NAME
GPO1/
PHYAD4
FDUPLEX/
PHYAD3
ACTIVITY/
PHYAD2
LINK/
PHYAD1
SPEED100/
PHYAD0
Table 3.4 Boot Strap Configuration Inputsa
TYPE
I/O
I/O
I/O
I/O
I/O
DESCRIPTION
PHY Address Bit 4: set the default address of the PHY. This
signal is mux’d with GPO1
PHY Address Bit 3: set the default address of the PHY.
Note: This signal is mux’d with FDUPLEX
PHY Address Bit 2: set the default address of the PHY.
Note: This signal is mux’d with ACTIVITY
PHY Address Bit 1: set the default address of the PHY.
Note: This signal is mux’d with LINK
PHY Address Bit 0: set the default address of the PHY.
Note: This signal is mux’d with SPEED100
SMSC LAN8187/LAN8187I
14
DATASHEET
Revision 1.0 (12-14-06)

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