LAN9220 Ver la hoja de datos (PDF) - SMSC -> Microchip

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LAN9220

16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support

SMSC -> Microchip 

1.11

16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support

Datasheet

Host Bus Interface (SRAM Interface)

The host bus interface provides a FIFO interface for the transmit and receive data paths, as well as

an interface for the LAN9220 Control and Status Registers (CSR’s).

The host bus interface is the primary bus for connection to the embedded host system. This interface

models an asynchronous SRAM. TX FIFO, RX FIFO, and CSR’s are accessed through this interface.

Programmed I/O transactions are supported.

The LAN9220 host bus interface supports 16-bit bus transfers. Internally, all data paths are 32-bits

wide. The LAN9220 can be interfaced to either Big-Endian or Little-Endian processors and includes

mixed endian support for FIFO accesses.

Revision 2.7 (03-15-10)

14

DATASHEET

SMSC LAN9220

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